发明名称 Circuit for producing a variable frequency clock signal having a high frequency low jitter pulse component
摘要 A system and method provides a pulse train clock signal having a portion appropriate for loading and loading a scan chain of a circuit under test, and a higher frequency portion with a sharp leading edge appropriate for inputting a test signal into the scan elements for transition fault testing. The circuit and method provide this signal by taking as inputs to a multiplexer switch, two synchronous pulse trains, and provide edge sharpening and frequency raising to one of the signals, and input each of these signals into a multiplexer switch, and rapidly switch between these signals depending upon a selection control signal that is synchronous with each signal. The multiplexer switches between these input signals during a low valued portion of each signal so that the less sharp edge of the selection control signals and the high frequency input signal do not affect the sharp pulse of the very high frequency portion. An embodiment of the invention includes both a static low signal input top the multiplexer for transition switching, and special alignment circuits to compensate for the different delays experienced by each of the inputs and selection signals.
申请公布号 US2005149779(A1) 申请公布日期 2005.07.07
申请号 US20040985686 申请日期 2004.11.10
申请人 BLEAKLEY THOMAS E. 发明人 BLEAKLEY THOMAS E.
分类号 G01R31/317;G01R31/3185;G06F1/08;H03K5/12;H03K5/1252;H03K5/135;H03L7/00;(IPC1-7):G11B5/00;G01R31/28;G06K5/04;G11B20/20 主分类号 G01R31/317
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