发明名称 Voltage detect mechanism
摘要 According to one embodiment a computer system is disclosed. The computer system includes a central processing unit (CPU) and a memory device, coupled to the CPU. The memory device includes a charge pump circuit to amplify a first voltage, and a voltage detection circuit coupled to the charge pump circuit to disable the charge pump circuit if a second voltage is detected.
申请公布号 US2005146949(A1) 申请公布日期 2005.07.07
申请号 US20030747390 申请日期 2003.12.29
申请人 MUNGUIA PETER R.;BUTLER EDWARD 发明人 MUNGUIA PETER R.;BUTLER EDWARD
分类号 G11C5/14;G11C7/00;(IPC1-7):G11C7/00 主分类号 G11C5/14
代理机构 代理人
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