Semiconductor memory apparatus

摘要

A semiconductor memory apparatus is provided which has a simple circuit configuration and is capable of randomly accessing fuse data. In the semiconductor memory apparatus of the present invention, a fuse cell 30 including a fuse 31 is connected to a pair of bit lines of a memory circuit. The fuse 31 and a fuse data output circuit (which includes a resistor 32 and an inverter 33 ) are connected to a pair of bit lines BLT and BLB of the memory circuit through a fuse selection switch 34 . In the semiconductor memory apparatus of the present invention, by allowing a column decoder 12 for selecting a pair of bit lines of the memory cell to also function as a decoder circuit for selecting a fuse, the bit lines of the memory circuit can be used as signal lines for outputting fuse data, whereby the circuit size is reduced and the circuit area is reduced.