发明名称 NOISE SHAPED INTERPOLATOR AND DECIMATOR APPARATUS AND METHOD
摘要 Improved interpolator (1304) and decimator (1324) apparatus and methods, including the addition of an elastic storage element (192) comprises a FIFO which advantageously allows short term variation in sample clocks to be absorbed, and also provides a feedback mechanism for controlling a delta-sigma modulated modulo-N counter based sample clock generator. The elastic element combined with a delta-sigma modulator and counter creates a noise-shaped frequency lock loop without additional components, resulting in a much simplified imterpolator and decimator.
申请公布号 WO2005015752(A8) 申请公布日期 2005.07.07
申请号 WO2004US25323 申请日期 2004.08.04
申请人 STMICROELECTRONICS, INC. 发明人 NORSWORTHY, STEVEN, R.;REDGRAVE, JASON, RUPERT
分类号 H03H17/06;H04B;H04L27/10;(IPC1-7):H04L27/10 主分类号 H03H17/06
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