发明名称 Wiring line assembly and method for manufacturing the same, and thin film transistor array substrate having the wiring line assembly and method for manufacturing the same
摘要 In a method for fabricating a thin film transistor array substrate, a glass substrate undergoes an oxygen plasma treatment. A silver or silver alloy-based conductive layer is deposited onto the substrate, and patterned to thereby form a gate line assembly proceeding in the horizontal direction. The gate line assembly includes gate lines, gate electrodes, and gate pads. Thereafter, a silicon nitride-based gate insulating layer is deposited onto the substrate, and a semiconductor layer and an ohmic contact layer are sequentially formed on the gate insulating layer. The semiconductor layer and the ohmic contact layer are HF-treated. A silver alloy-based conductive layer is deposited onto the substrate, and patterned to thereby form a data line assembly. The data line assembly includes data lines crossing over the gate lines, source electrodes, drain electrodes, and data pads. A protective layer based on silicon nitride or an organic material is deposited onto the substrate, and patterned through dry etching such that the protective layer bears contact holes exposing the drain electrodes, the gate pads and the data pads, respectively. An indium zinc oxide or indium tin oxide-based layer is deposited onto the substrate, and patterned to thereby form pixel electrodes, and subsidiary gate and data pads. The pixel electrodes are electrically connected to the drain electrodes, and the subsidiary gate and data pads to the gate and data pads.
申请公布号 US2005145844(A1) 申请公布日期 2005.07.07
申请号 US20050053833 申请日期 2005.02.10
申请人 JEONG CHANG-OH;KANG BONG-JOO;LEE JAE-GAB 发明人 JEONG CHANG-OH;KANG BONG-JOO;LEE JAE-GAB
分类号 G02F1/1345;G02F1/1362;G02F1/1368;G09F9/00;G09F9/30;H01L21/3205;H01L21/336;H01L21/77;H01L21/84;H01L23/52;H01L23/532;H01L27/12;H01L29/43;H01L29/49;H01L29/786;(IPC1-7):H01L29/04 主分类号 G02F1/1345
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