摘要 |
High-resolution digital pulse width modulator having a digital pulse width modulator unit for receiving a clock signal and for receiving first bits of a digital control signal in order to generate a first pulse width modulated intermediate signal whose pulse width is an integral multiple of the clock period, having a programmable signal delay path for delaying the first intermediate signal by a programmable delay time on the basis of second bits of the digital control signal and for outputting at least one pulse width modulated intermediate signal, the signal delay time being synchronized with the clock signal, and having a logic circuit for logically combining the intermediate signals and outputting them to form a pulse width modulated output signal.
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