发明名称 |
TRANSITIONING FROM INSTRUCTION CACHE TO TRACE CACHE ON LABEL BOUNDARIES |
摘要 |
Various embodiments of methods and systems for implementing a microprocessor (100) that includes a trace cache (160) and attempts to transition fetching from instruction cache (106) to trace cache (160) only on label boundaries are disclosed. In one embodiment, a microprocessor (100) may include an instruction cache (106), a branch prediction unit (132), and a trace cache (160). The prefetch unit (108) may fetch instructions from the instruction cache (106) until the branch prediction unit (132) outputs a predicted target address for a branch instruction. When the branch prediction unit (132) outputs a predicted target address, the prefetch unit (108) may check for an entry (162) matching the predicted target address in the trace cache (160). If a match is found, the prefetch unit (108) may fetch one or more traces (166) from the trace cache (160) in lieu of fetching instructions from the instruction cache (106). |
申请公布号 |
WO2005062167(A2) |
申请公布日期 |
2005.07.07 |
申请号 |
WO2004US39269 |
申请日期 |
2004.11.22 |
申请人 |
ADVANCED MICRO DEVICES, INC.;ALSUP, MITCHELL;SMAUS, GREOGORY, WILLIAM |
发明人 |
ALSUP, MITCHELL;SMAUS, GREOGORY, WILLIAM |
分类号 |
G06F9/30;G06F9/38 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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