| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a synchronizing clock generating apparatus improving lock accuracy and expanding a lock range without bit expansion in circuit configuration when generating a horizontal synchronizing clock. <P>SOLUTION: The synchronizing clock generating apparatus comprises: a multiplier 105 which multiplies a horizontal synchronizing separating signal S103 and a horizontal synchronizing pulse signal S104 to generate multiplication data S105; a gain variable LPF 906 which extracts only a DC component from the multiplication data S105 and controls a gain; and a controller 907 which calculates gain control data S107, lock center frequency setting data S407, and LPF gain control data S907 from correction data S906. A shift amount and a variation amount from a lock center frequency are then detected. When the shift amount is great, the lock center frequency is shifted to shift a lock range to a frequency axis, thereby expanding an apparent lock range, and when the variation amount is small, a gain is reduced, thereby improving lock accuracy. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
