发明名称 |
Method of fabrication on a gate pattern of a non-volatile memory device |
摘要 |
A method for fabricating a non-volatile memory device is provided. The method for fabricating a non-volatile memory device includes the steps of: forming a gate pattern in which a first conductive layer is used as a floating gate, a second conductive layer is used as a control gate, the first conductive layer, a dielectric layer, and the second conductive layer are sequentially stacked on a semiconductor substrate; forming a polishing stopper on the gate pattern and the semiconductor substrate; forming an interlayer insulating layer on the polishing stopper; forming a common source line (CSL) by etching a portion of the interlayer insulating layer, and a portion of the polishing stopper, and depositing a conductive material to the etched portions; planarizing the common source line and the interlayer insulating layer until the surface of the polishing stopper is exposed; partially etching back the polishing stopper until the surface of the second conductive layer is exposed; and forming a silicide layer on the exposed second conductive layer and the common source line.
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申请公布号 |
US6913972(B2) |
申请公布日期 |
2005.07.05 |
申请号 |
US20010927594 |
申请日期 |
2001.08.10 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
HAN JA-HYUNG;HAN MYUNG-SIK;KIM KYUNG-HYUN;HONG CHANG-KI |
分类号 |
H01L21/8247;H01L27/115;H01L29/788;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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