发明名称 Methods and apparatus for address generation in processors
摘要 Methods and apparatus to generate addresses in processors are disclosed. An example address generator disclosed herein includes an adder to add a first address component and a second address component to generate an address, a correction indicator to indicate if the address is correct, and a control input to modify an operation of the adder.
申请公布号 US2005144423(A1) 申请公布日期 2005.06.30
申请号 US20030747764 申请日期 2003.12.29
申请人 INTEL CORPORATION 发明人 PATEL RAJESH B.;FARRELL ROBERT L.;PHILLIPS JAMES E.;KUTTANNA BELLIAPPA;SIERS SCOTT E.;GRIFFITH T.W.
分类号 G06F9/355;G06F9/38;G06F12/06;(IPC1-7):G06F12/06 主分类号 G06F9/355
代理机构 代理人
主权项
地址