发明名称 Memory controller, flash memory system, and method of controlling operation for data exchange between host system and flash memory
摘要 There is disclosed a controller included in a flash memory system attachable to a memory interface of a host system. The controller performs a process for minimizing the maximum number of defective blocks to be classified into each zone, by using a plurality of replacement tables or a plurality of functions. Specifically, a dispersion process unit included in the controller associates virtual block addresses VBA with physical block addresses PBA so as to minimize the maximum number of defective blocks to be classified into each zone. The flash memory system may have a plurality of replacement tables describing correspondence between virtual block addresses VBA and physical block addresses PBA. Or, in the flash memory system, plural kinds of functions for setting correspondence between virtual block addresses VBA and physical block addresses PBA may be defined by the controller.
申请公布号 US2005144418(A1) 申请公布日期 2005.06.30
申请号 US20040794478 申请日期 2004.03.04
申请人 KITA KENZO 发明人 KITA KENZO
分类号 G06F12/02;G06F12/08;(IPC1-7):G06F12/08 主分类号 G06F12/02
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