| 摘要 |
A signal for the single-wire circuit is inputted and separated into two signals by the input separator circuit and the two signals are inputted in parallel into the two-wire transmitter circuit comprises at least one set of logic gates in which a P-channel CMOS transistor and a N-channel CMOS transistor whose size is different from that of the P-channel CMOS transistor are complementarily connected. The two-wire transmitter circuit outputs a first signal speeded up the rising transition time thereof from one of the logic gates and also outputs a second signal speeded up the falling transition time thereof from the other of the logic gates. The output converter circuit inputs in parallel the first signal and the second signal outputted from the two-wire transmitter circuit and converts them into a signal for the single-wire circuit.
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