| 摘要 |
<P>PROBLEM TO BE SOLVED: To reduce costs of an apparatus by eliminating line memories normally required between an elongation circuit and a recording part without lowering the performance of the apparatus itself. <P>SOLUTION: In the apparatus configured to transfer one line amount of VDO data (image data) during one pulse of an HSYNC (horizontal scanning synchronizing signal), an occurrence timing of a transfer VCLK for transferring image data is controlled in accordance with an elongation speed of elongated image data outputted from the elongation circuit. <P>COPYRIGHT: (C)2005,JPO&NCIPI |
