发明名称 Semiconductor memory device
摘要 In a semiconductor memory device including memory cells respective having a ferroelectric capacitor, and are provided at intersection portions of sets of a plurality of word lines and plate lines which is adjacent thereto, with bit lines, clamp circuits are respectively connected between the bit lines and nodes being supplied with reference potentials. Herewith, electric charges supplied from the ferroelectric capacitors to the bit lines are extracted by the clamp circuits, and capacities of the bit lines are increased artificially. Consequently, during a data read operation, an amount of electric potential change of the bit lines according to stored data in the ferroelectric capacitors is improved, and it becomes possible to obtain a large potential difference between the bit lines.
申请公布号 US2005141260(A1) 申请公布日期 2005.06.30
申请号 US20050072241 申请日期 2005.03.07
申请人 FUJITSU LIMITED 发明人 SUZUKI HIDEAKI
分类号 G11C11/22;(IPC1-7):G11C11/22 主分类号 G11C11/22
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