发明名称 METHOD AND DEVICE WHICH GENERATE QUADRATURE CLOCK
摘要 <P>PROBLEM TO BE SOLVED: To perform adjustment so that phase of a clock of a certain region of an integrated circuit becomes the same phase as that of a clock of another region. <P>SOLUTION: In a method and a device which generate a quadrature clock, a quadrature clock generating device contains a clock generater which provides a double clock which has a double frequency of that of a received reference clock. A frequency divider circuit is combined so that an alignment signal may be offered which has a frequency of the half of the double clock. Following the alignment signal, a first clock and a second clock are recovered from the double clock by a recovery circuit. The first clock and the second clock have a phase difference of substantially 90&deg;. <P>COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005176368(A) 申请公布日期 2005.06.30
申请号 JP20040353754 申请日期 2004.12.07
申请人 HEWLETT-PACKARD DEVELOPMENT CO LP 发明人 WYATT PERRY M;BERKRAM DANIEL A;NEWSOME DAVID T
分类号 G06F1/06;G06F1/04;G06F1/10;H03H11/16;H03K3/00;H03K5/00;H03K5/15;H03L7/06;H03L7/183;H04L7/04 主分类号 G06F1/06
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