发明名称 Method for forming gate in semiconductor device
摘要 Disclosed is a method for forming a gate in a semiconductor device. The method includes the steps of: sequentially forming a gate insulation layer and an inter- layer insulation layer on a substrate; patterning the inter- layer insulation layer into a predetermined configuration, thereby forming a patterned inter-layer insulation layer; forming a nitride layer on the patterned inter-layer insulation layer; simultaneously etching the nitride layer and the substrate, thereby obtaining a spacer on sidewalls of the patterned inter-layer insulation layer and a trench having a predetermined depth in the substrate; forming a conductive layer on the trench; and planarizing the conductive layer, thereby forming the gate.
申请公布号 US2005142809(A1) 申请公布日期 2005.06.30
申请号 US20040879777 申请日期 2004.06.28
申请人 PARK KYE-SOON 发明人 PARK KYE-SOON
分类号 H01L21/28;H01L21/336;H01L21/8234;H01L29/49;(IPC1-7):H01L21/76 主分类号 H01L21/28
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