发明名称 OFFSET, DELAY AND PARASITICALLY IMMUNE RESISTER-CAPACITOR (RC) TRACKING LOOP AND METHOD OF USING SAME
摘要 A resistor capacitor (RC) tracking loop includes a parasitic insensitive integrator ( 211 ) charged by a buffer ( 207 ) with offset compensation. The integrator ( 211 ) operates to provide an accurate ramped voltage proportional to a measured RC time constant. A single comparator ( 213 ) is used for sensing the voltage ramp rate by detecting two multiplexed reference voltages (V<SUB>REFLO </SUB>V<SUB>REFHI</SUB>). A timer within controller ( 201 ) is triggered by the V<SUB>REFLO </SUB>crossing at comparator ( 213 ). The timer counts the number of precision reference clock periods (F<SUB>REF</SUB>) that occur between the V<SUB>REFLO </SUB>and V<SUB>REFHI </SUB>crossings and adjusts an accumulator within controller ( 201 ) to a value (M). This value (M) is directly used to adjust a resistor and/or capacitor array used in a continuous time filter whose bandwidth and corner frequency can be precisely tuned.
申请公布号 US2005140431(A1) 申请公布日期 2005.06.30
申请号 US20030748878 申请日期 2003.12.30
申请人 RICHES JAMES J. 发明人 RICHES JAMES J.
分类号 H03B1/00;H03H7/01;H03K5/00;(IPC1-7):H03B1/00 主分类号 H03B1/00
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