| 摘要 |
PROBLEM TO BE SOLVED: To improve integration and strengthen durability to electomigration. SOLUTION: The gate array semiconductor device is provided with a basic cell 9 that is comprised of a first cell 10 provided with p-type semiconductor areas 2A-2C and an n-well contact 7 of an n-well 1 and p-type semiconductor areas 4A-4C and a p-well contact 8 of a p-well 3, and a second cell 11 provided with n-type semiconductor areas 12A-12C of the n-well 1 and n-type semiconductor areas 14A-14C of the p-well 3. In such a structure, it is also provided with VDD wiring 19 that is connected with the n-type well contact 7 of the first cell 10 and is connected with the p-type semiconductor area 12B of the second cell 11 through contact holes 12c and 12j at two positions in the horizontal direction, and GND wiring 20 that is connected with the p-type well contact 8 of the first cell 10 and the n-type semiconductor area 14B of the second cell 11 through contact holes 14c and 14j in the horizontal direction. COPYRIGHT: (C)2005,JPO&NCIPI
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