发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a highly reliable semiconductor integrated circuit device capable of preventing the excessive application of a voltage to a ferroelectric capacitor. SOLUTION: This semiconductor integrated circuit device is provided with a memory cell array MCA including a memory cell having a ferroelectric capacitor as a memory element having first and second electrodes. A first bit line BL is electrically connected to the first electrode. A first potential generation circuit 1 supplies first potential to the second electrode to apply a voltage lowered at a first change rate accompanying a temperature increase. A sense amplifier 2 amplifies a potential difference between the first bit line and a second bit line/BL complementary to the first bit line. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005174435(A) 申请公布日期 2005.06.30
申请号 JP20030411430 申请日期 2003.12.10
申请人 TOSHIBA CORP 发明人 OGIWARA TAKASHI;TAKASHIMA DAIZABURO
分类号 G11C11/22;(IPC1-7):G11C11/22 主分类号 G11C11/22
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