发明名称 System and method for improving solder joint reliability in an integrated circuit package
摘要 A system and method is disclosed for improving solder joint reliability in an integrated circuit package. Each terminal of a quad, flat, non-leaded integrated circuit package is formed having portions that define a solder slot in the bottom surface of the terminal. An external surface of the die pad of the integrated circuit package is also formed having portions that define a plurality of solder slots on the periphery of the die pad. When solder is applied to the die pad and to the terminals, the solder that fills the solder slots increases the solder joint reliability of the integrated circuit package.
申请公布号 US2005139972(A1) 申请公布日期 2005.06.30
申请号 US20030746745 申请日期 2003.12.24
申请人 STMICROELECTRONICS, INC. 发明人 CHIU ANTHONY M.;TEE TONG Y.
分类号 H01L23/50;H01L23/31;H01L23/495;H05K3/34;(IPC1-7):H01L23/02 主分类号 H01L23/50
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