发明名称 Method and system for testing a logic design
摘要 A method of testing a logic design in one disclosed embodiment includes identifying a plurality of clocked logic elements of a first logic design. The plurality of logic elements is subdivided into M individual groups of elements. A distinct pseudo-clock is assigned to each of the M groups such that each of the M groups of logic elements is associated with a distinct clock domain in a second logic design. A simulation is performed on the second logic design with the M pseudo-clocks.
申请公布号 US2005144580(A1) 申请公布日期 2005.06.30
申请号 US20030732394 申请日期 2003.12.10
申请人 BERKRAM DANIEL A.;KRUEGER DANIEL W. 发明人 BERKRAM DANIEL A.;KRUEGER DANIEL W.
分类号 G06F9/45;(IPC1-7):G06F9/45 主分类号 G06F9/45
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