发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To solve the problems that heat treatment for mounting a bipolar transistor in miniaturized CMOS causes the diffusion profile of the CMOS to be changed with different circuit characteristics among such CMOS's, conventional design resources cannot be used as they are, and that addition of a step (heat treatment) causes a cost increase. SOLUTION: Since a step of forming a diffusion layer as a collector and the base of a bipolar transistor in an element region and a step of forming a diffusion layer as a well and a threshold control layer of a MOS transistor in a second element region can be attained in an identical heat treatment; a bipolar forming step has no effect on the electrical characteristic of the complementary MOS transistor. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005175349(A) 申请公布日期 2005.06.30
申请号 JP20030416205 申请日期 2003.12.15
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TSUJINO HIDEJI
分类号 H01L27/06;H01L21/8224;H01L21/8249;H01L27/082;(IPC1-7):H01L21/824;H01L21/822 主分类号 H01L27/06
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