发明名称 |
Method and apparatus for enabling volatile shared data across caches in a coherent memory multiprocessor system to reduce coherency traffic |
摘要 |
Embodiments include a system for supporting the sharing of volatile data between processors, caches and similar devices to minimize thrashing of a data structure tracking shared data. The system may include a modified, exclusive and shared volatile state. The system may also include a volatile load or read command.
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申请公布号 |
US2005144397(A1) |
申请公布日期 |
2005.06.30 |
申请号 |
US20030747977 |
申请日期 |
2003.12.29 |
申请人 |
RUDD KEVIN W.;VAID KUSHAGRA V. |
发明人 |
RUDD KEVIN W.;VAID KUSHAGRA V. |
分类号 |
G06F12/00;G06F12/08;(IPC1-7):G06F12/00 |
主分类号 |
G06F12/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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