发明名称 Low voltate EEPROM/NVRAM transistors and making method
摘要 An electrically programmable memory device which has greater efficiency of electron injection from the channel to the floating gate comprises a substrate (401) having source (404) and drain (406) regions with a channel (410,413) therebetween; a floating gate structure over portions of the source (404) and drain (406) regions and the channel (410,413), which structure includes a dielectric layer (420) and a conductor layer (440) thereover, the channel under the floating gate (440) having both horizontal (410) and vertical (413) components.
申请公布号 EP1548841(A2) 申请公布日期 2005.06.29
申请号 EP20050004977 申请日期 1997.12.08
申请人 HALO LSI DESIGN AND DEVICE TECHNOLOGY INC. 发明人 OGURA, SEIKI
分类号 H01L21/28;H01L21/336;H01L21/8247;H01L27/115;H01L29/423;H01L29/788;(IPC1-7):H01L29/788 主分类号 H01L21/28
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