| 摘要 |
A processor and method of booting the processor and provided in which dispensable circuit operation is eliminated to reduce power consumption. A first expected check-sum value relating to instructions and table data and a second expected check-sum value relating only to instructions are held in a boot ROM (5). When power is turned on, if a power-on determination circuit (2) determines that the power has been turned on for a system, a read selection circuit (3) loads instructions and the table data into an instruction storage memory (7) and a table data storage memory (8) and a check-sum performing circuit (4) performs check-sum using the first expected check-sum value. In the case where the power has been turned on for periodic operation, instructions are loaded into the instruction storage memory (7), check-sum is performed using the second expected check-sum value, and table data that was saved in a backup memory (6) is loaded into the table data storage memory (8). Thus, the time required for loading from the boot ROM (5) for the periodic operation decreases. <IMAGE> |
