发明名称 Method and apparatus for power supply noise modeling and test pattern development
摘要 An approach for power supply noise modeling for test pattern development. For one aspect, conditions that may result in power supply noise-related failures are identified and the resulting faults are ranked.
申请公布号 US6912701(B2) 申请公布日期 2005.06.28
申请号 US20020185866 申请日期 2002.06.26
申请人 INTEL CORPORATION 发明人 KUNDU SANDIP
分类号 G01R31/317;G01R31/3183;G06F17/50;(IPC1-7):G06F17/50 主分类号 G01R31/317
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