| 摘要 |
An electronic circuit apparatus and integrated circuit device, wherein an arrangement of connection terminals, external connection terminals and input/output interface circuits of a semiconductor chip as a unit circuit device is optimized so as to attain a suppression of a power consumption and a shorter signal transmission time, configured that only connection pads are allocated to be arranged on a mutually adjacent side of semiconductor chips 1 and 2 , and input/output interface circuits, test pads and external connection pads are arranged along the remaining three sides, moreover, the connection pads and the electronic circuits are directly connected and not connected via the input/output interface circuits. |
