发明名称 |
Current controlled delay circuit |
摘要 |
A current controlled delay circuit is disclosed. Two currents of constant sum are generated to control the delay of the circuit. The circuit includes a differential pair to switch one of the two currents from one leg of the circuit to another leg of the circuit. The circuit includes a cross-coupled pair to switch the other of the two currents from one leg of the circuit to another leg of the circuit. The circuit may include a fixed or variable load.
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申请公布号 |
US6911857(B1) |
申请公布日期 |
2005.06.28 |
申请号 |
US20020305589 |
申请日期 |
2002.11.26 |
申请人 |
CYPRESS SEMICONDUCTOR CORPORATION |
发明人 |
STIFF JONATHON C. |
分类号 |
H03K3/356;H03K5/00;H03K5/13;H03K17/041;H03K17/28;(IPC1-7):H03K5/13 |
主分类号 |
H03K3/356 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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