发明名称 |
Method of forming dual damascene interconnection using low-k dielectric |
摘要 |
A method of forming a dual damascene interconnection employs a low-k dielectric organic polymer as an insulating layer. With only one hard mask layer, ashing damage to the insulating layer is prevented using a hard mask layer and an etch-stop layer that are different in etch rate from that of a self-aligned spacer. Further, it is possible to form a via hole that is smaller than the resolution limit of the photolithographic process. As a result, the process is simplified and a photoresist tail phenomenon does not occur.
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申请公布号 |
US6911397(B2) |
申请公布日期 |
2005.06.28 |
申请号 |
US20030412522 |
申请日期 |
2003.04.11 |
申请人 |
SAMSUNG ELECTRONICS, CO., LTD. |
发明人 |
JUN JIN-WON;KIM YOUNG-WUG;PARK TAE-SOO;LEE KYUNG-TAE |
分类号 |
H01L21/28;H01L21/311;H01L21/312;H01L21/316;H01L21/318;H01L21/768;H01L23/522;H01L23/532;(IPC1-7):H01L21/311 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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