发明名称 |
FANOUT WAFER-LEVEL-PACKAGE STRUCTURE AND METHOD OF MANUFACTURING SAME |
摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a fanout wafer-level-package structure and a method of manufacturing the same. <P>SOLUTION: In order to make the distance between dice 110 proper and wider than the original distance between dice 110 on a wafer, standard dice 110 are picked up and placed on a new base 100. With the adoption of a fan-out package, the package structure has wider ball-array geometry than the geometry of the die 110. Furthermore, a die 110 may be packaged with another die, which is an active element or has a neighboring structure or a stacked structure. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
申请公布号 |
JP2005167191(A) |
申请公布日期 |
2005.06.23 |
申请号 |
JP20040220573 |
申请日期 |
2004.07.28 |
申请人 |
ADVANCED CHIP ENGINEERING TECHNOLOGY INC |
发明人 |
YANG WEN-KUN;YANG WEN-PIN;CHEN SHIH-LI |
分类号 |
H01L23/12;H01L21/44;H01L21/48;H01L21/50;H01L21/58;H01L21/60;H01L23/00;H01L23/14;H01L23/31;H01L23/48;H01L23/485;H01L23/52;H01L23/522;H01L23/538;H01L23/552;H01L25/065;(IPC1-7):H01L23/12 |
主分类号 |
H01L23/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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