发明名称 Time sliced DSP operation for very high frequency pulse width modulated controllers
摘要 Methods and apparatus are provided for frequency scaling the PWM signal output of a controller/driver for an electrical device such as a BLDC motor. The apparatus comprises a number of multiple half-bridge assemblies, with each multiple half-bridge assembly connected to a respective phase winding of the motor. Each individual half-bridge assembly is operated within the frequency limit of its internal switching elements, but the composite output frequency of each multiple half-bridge assembly can be the product of the switching element frequency and the number of individual half-bridge assemblies in the multiple half-bridge assembly. High-speed torque loop control is implemented by synchronizing multiple DSP's with overlapping interrupts, so that the output pulse width of the PWM signal can be adjusted on a pulse-to-pulse basis. Moreover, the frequency scaling and pulse-to-pulse control processes can be achieved with standard off-the-shelf devices.
申请公布号 US2005135474(A1) 申请公布日期 2005.06.23
申请号 US20030740737 申请日期 2003.12.18
申请人 ATMUR ROBERT J. 发明人 ATMUR ROBERT J.
分类号 H02P6/08;H03K7/08;(IPC1-7):H03K7/08 主分类号 H02P6/08
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