| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To conduct a high-speed circuit operation by reducing timing restriction when transferring data at different frequencies between chips or between logical blocks in the chip. <P>SOLUTION: The integrated circuit which is operated by a clock MCLK of a first frequency to send information to the other circuit operated by a clock SCLK of a second frequency includes a synchronizing circuit 102 for sending information to the other circuit synchronously with the clock of the second frequency when sending the information to the other circuit. When sending information to the other circuit, the information is sent at a clock edge opposed to a clock edge for the other circuit to fetch information by the clock of the second frequency. In the integrated circuit which includes the first circuit operated by the clock of the first frequency and the second circuit operated by the clock of the second frequency on the same substrate and sends information from the first circuit to the second circuit, the first circuit includes the synchronizing circuit for sending information to the second circuit synchronously with the clock of the second frequency when sending the information to the second circuit. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
