发明名称 Input buffer circuit including reference voltage monitoring circuit
摘要 A buffer circuit includes a differential amplifier, a buffering inverter, and a reference voltage monitoring circuit. The differential amplifier has a reference voltage and a current source as inputs. The buffering inverter has an output of the differential amplifier as an input. The reference voltage monitoring circuit includes two transistors and a second current source. An output of the reference voltage monitoring circuit is connected to the buffering inverter so as to minimize an effect of a variation in the value of the reference voltage on signal propagation delay times. The buffer circuit can further include a driver circuit with a comparator. A method of managing signal propagation delays includes providing a differential amplifier, providing at least one buffering inverter, and providing a reference voltage monitoring circuit. The reference voltage monitoring circuit can maintain signal propagation delays as a reference voltage varies.
申请公布号 US2005134331(A1) 申请公布日期 2005.06.23
申请号 US20030739097 申请日期 2003.12.19
申请人 KIM JUNG P.;HAN JONGHEE 发明人 KIM JUNG P.;HAN JONGHEE
分类号 H03B1/00;H03K19/003;H03K19/0185;(IPC1-7):H03B1/00 主分类号 H03B1/00
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