METHOD OF FABRICATING CMOS TRANSISTOR

摘要

PROBLEM TO BE SOLVED: To minimize the associated complexity and cost in fabricating a CMOS structure containing silicide contacts and metal silicide gates. SOLUTION: The method of integrating the silicide metal of a CMOS allows incorporation of silicide contacts (S/D and gates) and metal silicide gates using a self-alignment process (salicide) and at least one lithography process. The integration method allows at least two different thicknesses of metals deposited on a semiconductor substrate such that on some of the CMOS transistors thinner silicide metals are formed and used in the formation of gate contacts, whereas on the other CMOS transistors thicker silicide metals are formed and used in the formation of metal silicide gates. The integration method of the present invention can also be used to form multiple phases of metal silicide gates by varying the metal deposition thickness thus having differing amounts of metal present during metal gate formation. COPYRIGHT: (C)2005,JPO&NCIPI