发明名称 Semiconductor device and method of manufacturing the same
摘要 The present invention is to improve yield and reliability in a wiring step of a semiconductor device. When an Al wiring on an upper layer is connected through an connection pillar onto an Al wiring on a lower layer embedded in a groove formed on an interlayer insulation film, a growth suppression film having an opening whose width is wider than that of the Al wiring is formed on the interlayer insulation film and the Al wiring. In this condition, Al and the like are grown by a selective CVD method and the like. Accordingly, the connection pillar is formed on the Al wiring within the opening, in a self-matching manner with respect to the Al wiring.
申请公布号 US2005133925(A1) 申请公布日期 2005.06.23
申请号 US20050050376 申请日期 2005.02.03
申请人 AOYAMA JUNICHI 发明人 AOYAMA JUNICHI
分类号 H01L21/28;H01L21/285;H01L21/316;H01L21/318;H01L21/3205;H01L21/768;H01L23/52;H01L23/522;H01L23/532;(IPC1-7):H01L21/476;H01L21/44;H01L29/40 主分类号 H01L21/28
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