| 摘要 |
An exemplary embodiment provides a synchronous/asynchronous interface circuit and an electronic device for coupling an asynchronous circuit block onto a globally synchronous circuit system. A synchronous/asynchronous interface circuit according to an exemplary embodiment of the present invention includes a finite state machine that controls access cycles between a synchronous bus and an asynchronous CPU in an event-driven fashion and a detection circuit that detects beginnings of the access cycles. In interfacing with the asynchronous CPU, the finite state machine controls the access cycles by transiting in states handshaking with the asynchronous CPU. Meanwhile, in interfacing with the synchronous bus, the finite state machine controls the access cycle by transiting in states synchronizing with a global clock supplied from the synchronous bus.
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