Blocking layer for silicide uniformity in a semiconductor transistor

摘要

A semiconductor device and fabrication process includes forming a gate dielectric overlying a semiconductor substrate and a gate electrode overlying the gate dielectric. The gate electrode includes an interface between a first portion of the gate electrode and a second portion of the gate electrode. A silicide is then formed overlying the gate electrode. The presence of the gate electrode interface substantially prevents the silicide from spiking into or through the gate electrode to encroach upon or contact the underlying gate dielectric. Forming the gate electrode may include forming a polysilicon first gate electrode layer and forming an amorphous silicon layer over the polysilicon first gate electrode layer. Forming the second gate electrode layer may include forming a SiGe first sublayer and a polysilicon second sublayer.