发明名称 Level shift circuit
摘要 In a level shift circuit, the threshold voltage of N-type high-voltage transistors, to whose gates the voltage of a low-voltage supply VDD is applied, is set low. An input signal IN powered by the low-voltage supply VDD is input to the gate of an N-type transistor by way of an inverter. Therefore, even if the potentials at nodes W 3 and W 4 exceed the voltage of the low-voltage supply VDD, reverse current flow from the nodes W 3 and W 4 via parasitic diodes within the inverters into the low-voltage supply VDD is prevented. A protection circuit, composed of N-type transistor whose respective gates are fixed to the low-voltage supply VDD, is disposed between the two N-type high-voltage transistors N 5 , N 6 and two N-type low-voltage transistors N 1 , N 2 for receiving the complementary signals IN and XIN, thereby preventing the breakdown of those N-type complementary-signal-receiving transistors.
申请公布号 US2005134355(A1) 申请公布日期 2005.06.23
申请号 US20040002625 申请日期 2004.12.03
申请人 MAEDE MASATO;NOJIRI NAOKI;GION MASAHIRO;KINUYAMA SHINJI;MATSUOKA DAISUKE;USAMI SHIRO 发明人 MAEDE MASATO;NOJIRI NAOKI;GION MASAHIRO;KINUYAMA SHINJI;MATSUOKA DAISUKE;USAMI SHIRO
分类号 H03K3/356;H03K17/10;(IPC1-7):H03L5/00 主分类号 H03K3/356
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