发明名称 OPERATION COMPARISON SYSTEM IN PROCESSOR MULTIPLEXING SYSTEM
摘要 PROBLEM TO BE SOLVED: To provide an operation comparison system in a processor multiplexing system suitable for performing comparison operation with high reliability and safety without depending on an operation frequency and a phase difference of the processor. SOLUTION: The system comprises a plurality of processors 1 to N different in phase to perform identical processing with identical operating frequency; storage devices 1 to N for receiving read/write independently of the plurality of processors; a comparator 7 for comparing address/data/control signals on a bus between the processors 1 to N and the storage devices 1 to N; and a common storage device 8 for receiving read/write in a state that comparison collation results from the comparator are normal. The comparator performs comparison collation operation for comparing the address/data/control signals passing on the bus within a bus cycle and verification operation of self soundness of the comparator itself. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005165807(A) 申请公布日期 2005.06.23
申请号 JP20030405470 申请日期 2003.12.04
申请人 HITACHI LTD 发明人 SHIMA YASUSUKE;SAKUYAMA HIDEO;MIZUTANI EIJI
分类号 G06F11/18;(IPC1-7):G06F11/18 主分类号 G06F11/18
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