发明名称 Dual-PLL signaling for maintaining synchronization in a communications system
摘要 A communications management system introduces a low bandwidth phase locked loop (LoBW-PLL) working in tandem with a high bandwidth phase locked loop (HiBW-PLL). The LoBW-PLL only needs to follow the average frequency of the transported clock and not all of the excursions made by the master clock. During periods of downstream outage, the LoBW-PLL opens its loop and free wheels such that disturbances caused by a reacquisition do not impact the concept of time for the LoBW-PLL. After reacquisition, the LoBW-PLL and HiBW-PLL are compared to determine if a timing error has occurred. If a timing error is detected, the magnitude of the timing error is measured upon completion of the reacquistion cycle, and this measurement is used to correct the timing error.
申请公布号 US2005135526(A1) 申请公布日期 2005.06.23
申请号 US20040967201 申请日期 2004.10.19
申请人 BROADCOM CORPORATION 发明人 MILLER KEVIN;WHITEHEAD RAY
分类号 H03L7/07;H04L7/00;H04L7/02;H04L27/14;(IPC1-7):H04L27/14 主分类号 H03L7/07
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