发明名称 Configurable cache
摘要 A method, apparatus, and system for configuring an address bit in a cache formed on an integrated circuit. The method, apparatus, and system include the ability to configure the address bit as either a tag bit or a set index bit and reconfigure the address bit.
申请公布号 US2005138293(A1) 申请公布日期 2005.06.23
申请号 US20030743162 申请日期 2003.12.22
申请人 SINGH MANISH 发明人 SINGH MANISH
分类号 G06F12/00;G06F12/08;(IPC1-7):G06F12/00 主分类号 G06F12/00
代理机构 代理人
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