发明名称 |
Round robin selection logic improves area efficiency and circuit speed |
摘要 |
A method and apparatus are provided for efficiently operating a round robin arbitration system in a given computer system. The system utilizes a series of banks of requesters and pointer. The banks of requesters and pointers operate on sequential AND-OR-Inverter/OR-AND-Inverter (AOI/OAI) logic to advance the pointer and efficiently select those requestors with pending requests. The use of the AOI/OAI logic circuitry in the banks of requestors and pointers allows for efficient selection and minimization of complex circuitry reducing the overall circuit area.
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申请公布号 |
US2005138055(A1) |
申请公布日期 |
2005.06.23 |
申请号 |
US20030738721 |
申请日期 |
2003.12.17 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
HANDLOGTEN GLEN H.;LIU PEICHUN P.;QI JIEMING |
分类号 |
G06F17/00;(IPC1-7):G06F17/00 |
主分类号 |
G06F17/00 |
代理机构 |
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代理人 |
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地址 |
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