发明名称 Method of manufacturing a semiconductor integrated circuit device including a gate electrode having a salicide layer thereon
摘要 A method of manufacturing a semiconductor integrated circuit device includes the steps of depositing a first insulating film over a first conductive layer, patterning the first insulating film by using a resist film as a mask to form a cap film, and removing the resist film. After which, a gate electrode of a MISFET is formed by etching the first conductive layer using the cap film as a mask. A second insulating film is deposited over the gate electrode and the cap film and a side wall spacer formed on side surfaces of the gate electrode by etching the second insulating film. After which, a salicide layer is selectively formed on the gate electrode. The cap film is removed by over-etching the first insulating film to etch the cap film.
申请公布号 US6908837(B2) 申请公布日期 2005.06.21
申请号 US20020251849 申请日期 2002.09.23
申请人 RENESAS TECHNOLOGY CORP. 发明人 TANIGUCHI YASUHIRO;SHUKURI SHOJI;KURODA KENICHI;IKEDA SHUJI;HASHIMOTO TAKASHI
分类号 H01L27/04;H01L21/336;H01L21/822;H01L21/8234;H01L21/8238;H01L21/8242;H01L21/8247;H01L27/092;H01L27/10;H01L27/105;H01L27/108;H01L29/78;(IPC1-7):H01L21/44 主分类号 H01L27/04
代理机构 代理人
主权项
地址