发明名称 МАТРИЦА ЯЧЕЙКИ ПАМЯТИ
摘要 FIELD: electrically programmable nonvolatile memory devices implemented by using microtechnology and nanotechnology methods. ^ SUBSTANCE: proposed memory array location that possesses both electrically programmable nonvolatile memory item properties and rectifying properties with characteristics providing for electrical isolation of location in array without enlarging its size has first-layer conducting bus disposed on substrate that electrically insulates it from other first-layer conducting buses of array; second-layer conducting bus intersecting first-layer conducting bus; insulating layer, 3 to 100 nm thick, separating first- and second-layer buses; insulating slot in the form of open end of insulating layer in vicinity of intersection of first-layer buses and edges of second-layer ones; variable-conductance material which is placed in insulating slot and changes its conductivity as electron flow is passed through this material; and medium above insulating slot surface affording exchange of variable-conductance material particles. Conducting bus of one of layers is made of p or n semiconductor. ^ EFFECT: enlarged functional capabilities. ^ 6 cl, 12 dwg
申请公布号 RU2004100899(A) 申请公布日期 2005.06.20
申请号 RU20040100899 申请日期 2004.01.09
申请人 Институт микроэлектроники и информатики РАН (RU) 发明人 Мордвинцев Виктор Матвеевич (RU);Кудр вцев Сергей Евгеньевич (RU);Левин Валерий Львович (RU)
分类号 H01L25/00;H01L27/115 主分类号 H01L25/00
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