发明名称 Sequential access memory for e.g. printer, has output buffer, central unit and comparator for allowing memory to effectuate reading of plane memory while preventing data read in plane memory from being applied on input/output
摘要 <p>The memory (MEM) has a comparator, an output buffer, and a central unit preventing execution of read or write command if high order address of extended address is different from that of high order address allocated to the memory. The buffer, the unit and the comparator are arranged to allow the memory to effectuate reading of a plane memory (MA) while preventing data read in the memory (MA) from being applied on serial input/output. An independent claim is also included for a method of manufacturing a plane memory addressable with an extended address.</p>
申请公布号 FR2863764(A1) 申请公布日期 2005.06.17
申请号 FR20030014622 申请日期 2003.12.12
申请人 STMICROELECTRONICS SA 发明人 ZINK SEBASTIEN;CAVALERI PAOLA;LECONTE BRUNO
分类号 G11C8/04;G11C8/12;(IPC1-7):G11C7/10;G06F12/02 主分类号 G11C8/04
代理机构 代理人
主权项
地址