发明名称 SEMICONDUCTOR WAFER, DOUBLE-SIDED POLISHING METHOD THEREFOR SEMICONDUCTOR WAFER, SEMICONDUCTOR WAFER AND CARRIER PLATE
摘要 <P>PROBLEM TO BE SOLVED: To provide a double-sided polishing method for a semiconductor wafer capable of easily reducing the outer peripheral sag of the semiconductor wafer, the semiconductor wafer which is polished by the double-sided polishing method for the semiconductor wafer and in which the outer peripheral sag is reduced, and a carrier plate for a double-sided polishing device properly used for the double-sided polishing method for the semiconductor wafer. <P>SOLUTION: The double-sided polishing method for the semiconductor wafer is composed of a primary double-sided polishing process polishing both surfaces of the wafer, and a secondary double-sided polishing process correcting the outer peripheral sag of the wafer generated in the primary double-sided polishing process. <P>COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005158798(A) 申请公布日期 2005.06.16
申请号 JP20030390928 申请日期 2003.11.20
申请人 SHIN ETSU HANDOTAI CO LTD 发明人 NEZU SHIGEYOSHI;KANAI AKIO
分类号 B24B37/08;B24B37/27;B24B37/28;H01L21/304 主分类号 B24B37/08
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