发明名称 Memory controller, memory control method, rate conversion apparatus, rate conversion method, image-signal-processing apparatus, image-signal-processing method, and program for executing each of those methods
摘要 A luminance signal Ya and a color-difference signal Ua/Va constituting an input image signal is transferred to a frame memory (first memory) in the unit of line synchronously with its horizontal synchronous signal and written therein. A memory TG 211 reads out a read-out request RRQ. The cycle of this request RRQ is a time computed based on a single vertical effective period of an output image signal Sc and the number of lines objective for rate conversion of an input image signal Sa. The luminance signal Ya and color-difference signal Ua/Va are transferred in the unit of line from the frame memory to rate conversion units (second memory) through buffers. There occurs no deflection in this transfer cycle and in each transfer cycle, the stable data transmission band can be secured.
申请公布号 US2005128493(A1) 申请公布日期 2005.06.16
申请号 US20040921267 申请日期 2004.08.19
申请人 SONY CORPORATION 发明人 NEMOTO KOHTARO;KONDO TETSUJIRO;ASAKURA NOBUYUKI;INOUE SATOSHI;NIITSUMA WATARU;ISHII TATSUYA;AYATA TAKAHIDE;YAMANAKA MASANORI;TATEHIRA YASUSHI
分类号 H04N7/00;G06F15/00;G09G3/20;G09G5/00;G09G5/39;G09G5/391;H04N5/44;H04N7/01;(IPC1-7):G06F15/00 主分类号 H04N7/00
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