发明名称 INTERRUPT CONTROLLER, COMMUNICATION CONTROLLER, MICROCOMPUTER, AND ELECTRONIC EQUIPMENT
摘要 PROBLEM TO BE SOLVED: To provide an interrupt controller or the like that prevents the overhead of the hardware resetting process needed for changing interrupt priority. SOLUTION: The interrupt controller 10 includes an interrupt cause holding part 40; an interrupt mask holding part 30 that holds interrupt mask values; circuits 50, 60 that generate interrupt signals and vectors; and reset circuits 80, 82 that reset interrupt cause values. On receiving predetermined interrupt cause signals, the interrupt cause holding part 40 holds them as the interrupt cause values of first and second interrupt causes. On receiving a first reset signal, the reset circuits reset the first and second interrupt causes, and include a circuit that implements a process to reverse the interrupt mask value matching the interrupt cause of the higher priority between the first and second interrupt causes. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005157778(A) 申请公布日期 2005.06.16
申请号 JP20030395930 申请日期 2003.11.26
申请人 SEIKO EPSON CORP 发明人 HASHIMOTO YOSHIAKI
分类号 G06F9/48;G06F9/46;(IPC1-7):G06F9/46 主分类号 G06F9/48
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