发明名称 |
METHOD AND SYSTEM FOR PROVIDING A HIGH SPEED MULTI-STREAM MPEG PROCESSOR |
摘要 |
An MPEG processor is provided (Fig. 2). According to one aspect of the processor, multiple MPEG data streams for corresponding channels are individually stored in an off-chip memory (Fig. 2, item 26). Corresponding data for a channel is then retrieved from the off-chip memory for processing. The retrieved data is then decoded (Fig. 2, item 18). The decoded results and associated information are stored on the off-chip memory. Some or all of the associated information that can be used for decoding subsequent data is stored in an on-chip memory (Fig. 2, item 26). When video images need to be displayed, the corresponding data that is needed for that purpose is then retrieved from the off-chip memory and provided to an analog encoder for encoding in a format that is compatible with an analog display device (Fig, 2, item 24). |
申请公布号 |
WO2005006404(A3) |
申请公布日期 |
2005.06.16 |
申请号 |
WO2004US22228 |
申请日期 |
2004.07.09 |
申请人 |
BROADLOGIC NETWORK TECHNOLOGIES INC.;ZHANG, WEIMIN;LIU, BINFAN;WANG, ZHONGQIANG |
发明人 |
ZHANG, WEIMIN;LIU, BINFAN;WANG, ZHONGQIANG |
分类号 |
G06K9/36;H01L;H04N5/00;H04N5/272;H04N7/12;H04N7/26;H04N7/50 |
主分类号 |
G06K9/36 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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