发明名称 CHIP SCALE PACKAGE AND METHOD OF ASSEMBLING THE SAME
摘要 A method of producing a chip scale package is disclosed. The method includes dicing a wafer into a plurality of chip arrays, each array including two or more integrated circuit chips. The method further includes mounting each array on a substrate and dicing each array, attached to the substrate, into individual chip scale packages, each individual chip scale package including only one integrated circuit chip.
申请公布号 WO2005053373(A2) 申请公布日期 2005.06.16
申请号 WO2004IB04394 申请日期 2004.12.02
申请人 UNITED TEST AND ASSEMBLY CENTER;TAN, HIEN BOON;WANG, CHUEN KHIANG;BIDIN, RAHAMAT;SUN, ANTHONY YI SHENG;CHONG, DESMOND YOK RUE;KOLAN, RAVI KANTH 发明人 TAN, HIEN BOON;WANG, CHUEN KHIANG;BIDIN, RAHAMAT;SUN, ANTHONY YI SHENG;CHONG, DESMOND YOK RUE;KOLAN, RAVI KANTH
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